Why Flapping and Unsynchronization Occur After Multiple Clock Sources Are Specified and the Clock Synchronization State Is Entered?

Created Apr 11, 2017 08:54:34Latest reply Apr 12, 2017 08:48:04 636 1 0 0
Why Flapping and Unsynchronization Occur After Multiple Clock Sources Are Specified and the Clock Synchronization State Is Entered?
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Adamcolob     Created Apr 12, 2017 08:48:04 Helpful(0) Helpful(0)

In the NTP application, an optimal clock source is selected as the system clock source from multiple synchronized clock sources. The corresponding algorithms are complicated, involving clock filtering, clock selection, and clock mitigation. After multiple clock sources pass clock filtering and clock selection and become candidate clock sources, the clock mitigation algorithm adjusts the local clock based on a weighted average algorithm, considering offsets of multiple clock sources.

The reason for using the clock mitigation algorithm is that the network environments are various for the packets of multiple precise clock sources to reach the local clock.
For example, if a clock source has a high level of precision but is far from the local clock, or the network environment is harsh, the clock source may provide the clock reference with a large error for the local clock.
If another clock source has a low level of precision but is near to the local clock, the clock source may provide the clock reference with a small error for the local clock.
In such a case, how to calculate a proper error correction value based on multiple clock sources? The clock mitigation algorithm provides the answer. Note that the algorithm assumes that multiple remote clock sources are precise.
The clock mitigation algorithm, however, is not a cure-all solution. If multiple clock sources are not synchronized to the same clock source or these clock sources have large time differences, the local clock may flap and lose synchronization after running the clock mitigation algorithm. In another scenario, the precision levels and conditions of multiple clock sources are almost the same. As a result, clock source switching may occur because it is difficult for the clock mitigation algorithm to calculate an optimal clock source.
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